Method of arraying self-scanning light-emitting element array chips

ABSTRACT

A method of arraying self-scanning light-emitting element array chips is provided, in which it is possible to remove defective chips completely. A plurality of self-scanning light-emitting array chips in a zigzag manner on a substrate, each chip being rectangular and comprising an array of light-emitting elements arrayed in a line facing to one end of the chip and a plurality of bonding pads provided on the other end of the chip. The plurality of chips are arrayed in such a manner that one ends of neighboring chips are arranged without overlapping in an array direction of chips so that an array pitch of chips is constant, and the other ends of the chips are arranged with overlapping in a direction perpendicular to an array direction of chips so that an array pitch of chips is constant.

TECHNICAL FIELD

The present invention relates to a method of arraying self-scanninglight-emitting element array chips, in which it is possible to removedefective chips. The present invention further relates to aself-scanning light-emitting device comprising a plurality of chipsarrayed by said method, and a method of removing defective chips fromarrayed chips.

BACKGROUND ART

A self-scanning light-emitting element array chip has a characteristicsuch that the number of bonding pads is more less than that of aconventional light-emitting element array chip. Due to thischaracteristic, the size of a chip may be effectively small. Forexample, if bonding pads are provided at both ends of a rectangularchip, the width of the chip may be short to that required only bybonding pads themselves. However, when a plurality of self-scanninglight-emitting element chips are arrayed in a straight line manner toform a self-scanning light-emitting device used for an optical printerhead, an array pitch of light-emitting elements can not be constant atthe ends of the neighboring chips. In order to avoid this, a pluralityof chips are arrayed in a zigzag manner such that the ends thereof areoverlapped (see Japanese Patent Publication No. 8-216448).

FIG. 1 shows a schematic drawing for explaining a method of arrayingchips in a zigzag manner. For assistance of explanation, an x-ycoordinate axis is designated in the figure. An x-axis direction showsan array direction of chips and a y-axis direction perpendicularthereto.

At the both ends of a self-scanning light-emitting element array chip10, there are provided bonding pads 12 between thereof a plurality oflight-emitting elements 14 are arrayed in a straight line manner. Aplurality of self-scanning light-emitting element array chips 10 arearrayed and fixed by means of an adhesive on a substrate (not shown inthe figure) in a zigzag manner in an x-axis direction, i.e. in such amanner that the ends of neighboring chips are overlapped in a y-axixdirection. According to this method, an array pitch of thelight-emitting elements may be constant through all of the chips.

A few chips may be defective by any reason after a die bonding processand wire bonding process to the chips arrayed on the substrate. In thiscase, it is not effective in cost to discard the substrate itselfthereon the defective chips are mounted. Therefore, the method isadopted such that only defective chips are removed and replaced bynormal chip. In fact, the defective chip is removed in such a mannerthat a metallic tool is push against the side of the chip. In theconventional chip array in a zigzag manner, neighboring chips areoverlapped at their ends in a y-axis direction. In order to remove onechips in the conventional chip array, that one chip only must be push bymeans of a narrow metallic tool 16 as shown in FIG. 1. A light-emittingelement array chip is generally made of fragile compound semiconductorsuch as GaAs. Therefore, when a force is applied to a part of thedefective chip fixed on the substrate by an adhesive, the chip isgenerally crushed leaving a portion of the chip overlapped in a y-axisdirection on the substrate. It is quite difficult to remove the leftportion without damaging the neighboring chips.

DISCLOSURE OF THE INVENTION

An object of the present invention is to provide a method of arrayingself-scanning light-emitting element array chips, in which it ispossible to remove defective chips completely.

Another object of the present invention is to provide a self-scanninglight-emitting device comprising a plurality of self-scanninglight-emitting element array chips arrayed by said method.

A further object of the present invention is to provide a method ofremoving defective chips.

A first aspect of the present invention is a method of arraying aplurality of self-scanning light-emitting array chips in a zigzag manneron a substrate, each chip being rectangular and comprising an array oflight-emitting elements arrayed in a line facing to one end of the chipand a plurality of bonding pads provided on the other end of the chip.In this method, the plurality of chips are arrayed in such a manner thatone ends of neighboring chips are arranged without overlapping in anarray direction of chips so that an array pitch of chips is constant,and the other ends of the chips are arranged with overlapping in adirection perpendicular to an array direction of chips so that an arraypitch of chips is constant.

Each self-scanning light-emitting element array chip comprises an arrayof transfer elements having such a structure that a plurality ofthree-terminal transfer elements each having a control electrode forcontrolling threshold voltage or current are arranged, the controlelectrodes of the transfer elements neighbored to each other areconnected via first electrical means, a power supply line is connectedto the control electrodes via second electrical means, and a clock lineis connected to one of two terminals except the control electrode ofeach of the transfer elements; and the array of light-emitting elementshaving such a structure that a plurality of three-terminallight-emitting elements each having a control electrode for controllingthreshold voltage or current are arranged.

A second aspect of the present invention is a self-scanninglight-emitting device comprising a plurality of self-scanninglight-emitting array chips which are arranged by the method of arrayingthe plurality of self-scanning light-emitting array chips in a zigzagmanner on a substrate.

A third aspect of the present invention is a method of removing adefective chip in a plurality of self-scanning light-emitting arraychips arrayed on a substrate by the method of arraying the plurality ofself-scanning light-emitting array chips in a zigzag manner on asubstrate. In this method, the defective chip is removed together with achip overlapped with the defective chip in a direction perpendicular toan array direction of chips by applying force to one side of thedefective chip or the chip overlapped therewith in a directionperpendicular to an array direction of chips.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic drawing for explaining a method of arraying chipsin a zigzag manner.

FIG. 2 is an equivalent circuit diagram of a self-scanninglight-emitting element array.

FIG. 3 shows an arrangement of bonding pads in a self-scanninglight-emitting array chip.

FIG. 4 shows the arrangement of chips.

BEST MODE FOR CARRYING OUT THE INVENTION

Referring to FIG. 2, there is shown an equivalent circuit diagram of aself-scanning light-emitting element array relating to the presentinvention. This self-scanning light-emitting element array has astructure such that the portion of an array of transfer elements and theportion of an array of light-emitting elements are separated. Theportion of an array of transfer elements includes transfer elements T₁,T₂, T₃, . . . and the portion of an array of light-emitting elementsincludes writable light-emitting elements L₁, L₂, L₃, . . . Thesetransfer elements and wirtable light-emitting elements consist ofthree-terminal light-emitting thyristors, respectively. The structure ofthe portion of an array of transfer elements further includes diode D₁,D₂, D₃, . . . as means for electrically connecting the gate electrodesof the neighboring transfer elements to each other. V_(GK) is a powersupply (normally 5 volts), and is connected to all of the gateelectrodes G₁, G₂, G₃, . . . of the transfer elements via a loadresistor R_(L), respectively. Respective gate electrodes G₁, G₂, G₃, . .. are correspondingly connected to the gate electrodes of the writablelight-emitting elements L₁, L₂, L₃, . . . A start pulse φ_(s) is appliedto the gate electrode of the transfer element T₁, transfer clock pulsesφ1 and φ2 are alternately applied to all of the anode electrodes of thetransfer elements, and a write signal φ_(I) is applied to all of theanode electrodes of the light-emitting elements.

The operation of this self-scanning light-emitting array will now bedescribed briefly. Assume that as the transfer clock pulse φ1 is drivento H (high level), the transfer element T₂ is turned on. At this time,the voltage of the gate electrode G₂ is dropped to a level near zerovolts from 5 volts. The effect of this voltage drop is transferred tothe gate electrode G₃ via the diode D₂ to cause the voltage of the gateelectrode G₃ to set about 1 volt which is a forward rise voltage (equalto the diffusion potential) of the diode D₂. On the other hand, thediode D₁ is reverse-biased so that the potential is not conducted to thegate G₁, then the potential of the gate electrode G₁ remaining at 5volts. The turn on voltage of the light-emitting thyristor isapproximated to a gate electrode potential+a diffusion potential of PNjunction (about 1 volt.) Therefore, if a high level of a next transferclock pulse φ2 is set to the voltage larger than about 2 volts (which isrequired to turn-on the transfer element T₃) and smaller than about 4volts (which is required to turn on the transfer element T₅), then onlythe transfer element T₃ is turned on and other transfer elements remainoff-state, respectively. As a result of which, on-state is transferredfrom T₂ to T₃. In this manner, on-state of transfer element aresequentially transferred by means of two-phase clock pulses.

The start pulse φ_(s) works for starting the transfer operationdescribed above. When the start pulse φ_(s) is driven to a low level(about 0 volt) and the transfer clock pulse φ2 is driven to a high level(about 2-4 volts) at the same time, the transfer element T₁ is turnedon. Just after that, the start pulse φ_(s) is returned to a high level.Assuming that the transfer element T₂ is in the on-state, the voltage ofthe gate electrode G₂ is lowered to almost zero volt. Consequently, ifthe voltage of the write signal φ_(I) is higher than the diffusionpotential (about 1 volt) of the PN junction, the light-emitting elementL₂ may be turned into an on-state (a light-emitting state).

On the other hand, the voltage of the gate electrode G₁ is about 5volts, and the voltage of the gate electrode G₃ is about 1 volt.Consequently, the write voltage of the light-emitting element L₁ isabout 6 volts, and the write voltage of the light-emitting element L₃ isabout 2 volts. It is appreciated from this that the voltage of the writesignal φ_(I) which can write into only the light-emitting element L₂ isin the range of about 1-2 volts. When the light-emitting element L₂ isturned on, that is, in the light-emitting state, the amount of the lightthereof is determined by the amount of current of the write signalφ_(I). Accordingly, the light-emitting elements may emit the light atany desired amount of light. In order to transfer on-state to the nextelement, it is necessary to first turn off the element in on-state bytemporarily dropping the voltage of the write signal φ_(I) down to zerovolts.

A self -scanning light-emitting device according to the presentinvention is fabricated by arraying a plurality of self-scanninglight-emitting array chips each thereof comprises 600 dpi (dot perinch)/128 light-emitting points, for example, and has a rectangularshape of about 5.4 mm length.

Referring to FIG. 3, there is shown an arrangement of bonding pads in aself-scanning light-emitting array chip 20. In the figure, φ1, φ2,φ_(s), φ_(I) and V_(GK) designate the bonding pads for clock pulses, astart pulse, a write signal, and a power supply, respectively. All ofthese bonding pads are arranged collectively at one side of the chip 20.The portion 22 of an array of transfer elements and the portion 24 of anarray of light-emitting elements are arranged so as to face to one endof the chip 20 opposite to said one side.

The arrangement of such chips is shown in FIG. 4. In the figure, onlythe light-emitting elements 14 and the bonding pads 26 designated in aschematic and enlarged manner are shown for simplifying the drawing.

The chips 20-1, 20-2, 20-3, . . . are arrayed on a substrate (not shown)in a zigzag manner like in FIG. 1. According to the present invention,the one ends (each thereto an array of light-emitting elements 14 isfaced) of the neighboring chips are arranged oppositely to each other sothat an array pitch of light-emitting elements 14 is constant (forexample, as the chips 20-1 and 20-2 in FIG. 4), and the other ends (eachthereon the bonding pads are provided) are arranged overlapping in ay-axis direction to each other so that an array pitch of light-emittingelements 14 is constant (for example, as the chips 20-2 and 20-3 in FIG.4).

In the same way as described above, the chips are mounted on thesubstrate by arraying them in a zigzag manner to fabricate aself-scanning light-emitting device.

Assume that the chip 20-2 is a defective one within the chips arrayed onthe substrate, and the chip 20-3 is overlapped with the chip 20-2. Inorder to remove the defective chip 20-2, a metallic tool 28 is pushedagainst the side of the chip 20-3 to apply the force to the chip 20-3 toremove the two chips together, as shown in FIG. 4. The chips 20-2 and20-3 are not overlapped with the chips 20-1 and 20-4 in a y-axisdirection. Therefore, it is possible to remove only two chips, becausethe force is not applied to the neighboring chips 20-1 and 20-4.

INDUSTRIAL APPLICABILITY

According to the method of the present invention described above, adefective chip may be removed from the self-scanning light-emittingelement array chips without damaging the chips neighbored to thedefective chip. Therefore, the cost reduction in fabricating theself-scanning light-emitting device may be effective.

What is claimed is:
 1. A method of arraying a plurality of self-scanninglight-emitting array chips in a zigzag manner on a substrate, each chipbeing rectangular and comprising an array of light-emitting elementsarrayed in a line facing to one end of the chip and a plurality ofbonding pads provided on the other end of the chip, characterized inthat; the plurality of chips are arrayed in such a manner that one endsof neighboring chips are arranged without overlapping in a directionperpendicular to an array direction of chips so that an array pitch ofchips is constant, and the other ends of the chips are arranged withoverlapping in a direction perpendicular to an array direction of chipsso that an array pitch of chips is constant.
 2. The method of claim 1,wherein each of the plurality of self-scanning light-emitting elementarray chips comprises; an array of transfer elements having such astructure that a plurality of three-terminal transfer elements eachhaving a control electrode for controlling threshold voltage or currentare arranged, the control electrodes of the transfer elements neighboredto each other are connected via first electrical means, a power supplyline is connected to the control electrodes via second electrical means,and a clock line is connected to one of two terminals except the controlelectrode of each of the transfer elements, and the array oflight-emitting elements having such a structure that a plurality ofthree-terminal light-emitting elements each having a control electrodefor controlling threshold voltage or current are arranged.
 3. Aself-scanning light-emitting device comprising a plurality ofself-scanning light-emitting array chips which are arranged by themethod of claim 1 or
 2. 4. A method of removing a defective chip in aplurality of self-scanning light-emitting array chips arrayed on asubstrate by the method of claim 1 or 2, characterized in that; thedefective chip is removed together with a chip overlapped with thedefective chip in a direction perpendicular to an array direction ofchips.
 5. The method of claim 4, wherein the defective chip and the chipoverlapped therewith are removed together by applying force to one sideof the defective chip or the chip overlapped therewith in a directionperpendicular to an array direction of chips.
 6. The method of claim 5,wherein the force is applied by pushing a metallic tool against the oneside of the defective chip or the chip overlapped therewith.